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a5gt
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fmcjesdadc1/a5gt- hard placement of ddr hr/qr registers
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2017-02-17 15:21:33 -05:00 |
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a5gte
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Makefiles: Change MMU enabling parameter for altera designs from MMU to NIOS2_MMU
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2017-04-18 10:57:16 +03:00 |
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a5soc
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a5soc- add ddr3 location assignments
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2017-03-22 10:12:34 -04:00 |
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a10gx
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altera srf files do not work
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2017-03-22 09:25:50 -04:00 |
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a10soc
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change pl ddr clock to 1G
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2017-05-01 09:35:10 -04:00 |
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ac701
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ac701_common/adv7511: Update IP instantiations
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2017-04-21 13:16:25 +03:00 |
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altera
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altera srf files do not work
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2017-03-22 09:25:50 -04:00 |
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c5soc
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arradio/c5soc- remove qsys files
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2017-03-20 15:56:07 -04:00 |
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kc705
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kc705_common/adv7511: Update IP instantiations
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2017-04-21 15:03:31 +03:00 |
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kcu105
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kcu105: ip automatic version update
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2017-04-18 11:59:54 +03:00 |
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microzed
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microzed: ip automatic version update
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2017-04-14 17:24:24 +03:00 |
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mitx045
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common: zed/zc702/zc706/mitx045: audio_clkgen: Disable phase alignment
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2017-04-20 18:12:24 +02:00 |
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vc707
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Ip automatic version update: common/board
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2017-04-12 19:03:16 +03:00 |
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xilinx
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xilinx- ad-ip-instance & ad-ip-parameter
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2017-04-06 13:04:19 -04:00 |
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zc702
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common: zed/zc702/zc706/mitx045: audio_clkgen: Disable phase alignment
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2017-04-20 18:12:24 +02:00 |
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zc706
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common: zed/zc702/zc706/mitx045: audio_clkgen: Disable phase alignment
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2017-04-20 18:12:24 +02:00 |
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zcu102
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zcu102/*- actual clock == desired clock
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2017-02-06 12:53:47 -05:00 |
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zed
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common: zed/zc702/zc706/mitx045: audio_clkgen: Disable phase alignment
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2017-04-20 18:12:24 +02:00 |
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Makefile
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Makefiles: Updated Makefiles
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2015-10-23 10:44:27 +03:00 |
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