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adi_board.tcl
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scripts/adi_board.tcl: use axi_interconnect for HP ports on Zynq-7000 family
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2023-10-30 09:48:32 -03:00 |
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adi_fmc_constr_generator.tcl
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scripts/adi_fmc_constr_generator: Fix intel constr generation
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2023-08-14 18:05:02 +03:00 |
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adi_intel_msg.tcl
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Add copyright and license to .tcl, .ttcl files
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2023-07-25 15:22:26 +03:00 |
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adi_make.tcl
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Add copyright and license to .tcl, .ttcl files
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2023-07-25 15:22:26 +03:00 |
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adi_make_boot_bin.tcl
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Add copyright and license to .tcl, .ttcl files
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2023-07-25 15:22:26 +03:00 |
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adi_pd.tcl
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Add copyright and license to .tcl, .ttcl files
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2023-07-25 15:22:26 +03:00 |
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adi_project_intel.tcl
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Add copyright and license to .tcl, .ttcl files
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2023-07-25 15:22:26 +03:00 |
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adi_project_xilinx.tcl
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scripts/adi_board.tcl: use axi_interconnect for HP ports on Zynq-7000 family
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2023-10-30 09:48:32 -03:00 |
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adi_tquest.tcl
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Add copyright and license to .tcl, .ttcl files
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2023-07-25 15:22:26 +03:00 |
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adi_xilinx_msg.tcl
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Add copyright and license to .tcl, .ttcl files
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2023-07-25 15:22:26 +03:00 |
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gtwiz_parser.pl
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Add copyright & license to .sh, .yml, .pl files. Edit Makefile for KV260
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2023-07-11 18:39:55 +03:00 |
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gtwizard_generator.tcl
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Add copyright and license to .tcl, .ttcl files
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2023-07-25 15:22:26 +03:00 |
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project-intel.mk
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scripts:project_intel.mk: Fix make clean-all target
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2024-01-23 14:32:11 +02:00 |
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project-toplevel.mk
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Make system: Be explicit in license that cover the make/build system
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2021-09-16 16:50:53 +03:00 |
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project-xilinx.mk
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scripts:project_xilinx.mk: Fix make clean-all target
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2024-01-23 14:32:11 +02:00 |
231632e8ca