d72fac4b1e
For consistent simulation behavior it is recommended to annotate all source files with a timescale. Add it to those where it is currently missing. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
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Makefile | ||
axi_jesd204_common_ip.tcl | ||
jesd204_up_common.v | ||
jesd204_up_sysref.v |