Laszlo Nagy 57f83f86ab jesd204_tpl: reduce address width of TPLs ... Registers from this component can fit in the 2k address range. Since Vivado's minimal address range is 4k, use that instead. This will allow placing the independent TPLs to base addresses that mach the addresses from the monolithic blocks ensuring no software intervention.		2018-12-04 14:02:22 +02:00
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Makefile	ad_ip_jesd204_tpl_adc: make core more generic	2018-12-04 14:02:22 +02:00
ad_ip_jesd204_tpl_adc.v	jesd204_tpl: reduce address width of TPLs	2018-12-04 14:02:22 +02:00
ad_ip_jesd204_tpl_adc_channel.v	ad_ip_jesd204_tpl_adc: make core more generic	2018-12-04 14:02:22 +02:00
ad_ip_jesd204_tpl_adc_core.v	ad_ip_jesd204_tpl_adc: make core more generic	2018-12-04 14:02:22 +02:00
ad_ip_jesd204_tpl_adc_deframer.v	ad_ip_jesd204_tpl_adc: make core more generic	2018-12-04 14:02:22 +02:00
ad_ip_jesd204_tpl_adc_hw.tcl	ad_ip_jesd204_tpl_adc: make core more generic	2018-12-04 14:02:22 +02:00
ad_ip_jesd204_tpl_adc_ip.tcl	ad_ip_jesd204_tpl_adc: make core more generic	2018-12-04 14:02:22 +02:00
ad_ip_jesd204_tpl_adc_pnmon.v	ad_ip_jesd204_tpl_adc: make core more generic	2018-12-04 14:02:22 +02:00
ad_ip_jesd204_tpl_adc_regmap.v	jesd204_tpl: reduce address width of TPLs	2018-12-04 14:02:22 +02:00