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Lars-Peter Clausen a4b9b1254a axi_ad9361/axi_dmac: Fix altrea AXI wrapper rid/wid handling 
We must make sure that the response ID is the same as the request ID when we
accepted the request. Otherwise we might respond with the wrong ID and the
system will lockup.

Also set rlast to 1 instead of 0.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2014-09-09 15:05:06 +02:00
library axi_ad9361/axi_dmac: Fix altrea AXI wrapper rid/wid handling 2014-09-09 15:05:06 +02:00
projects fmcomms2: c5soc: Add false path between 50MHz and VGA PLL clock 2014-09-09 15:05:06 +02:00
.gitignore a5soc: increase pipeline for qsys 2014-05-04 10:38:53 -04:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
README.md Add a link to EngineerZone 2014-04-15 10:25:18 +03:00

README.md

hdl

Analog Devices HDL libraries and projects

First time users, it is highly recommended to go through our HDL user guide at the following url:

http://wiki.analog.com/resources/fpga/docs/hdl

For support please visit our FPGA Reference Designs Support Community on EngineerZone:

http://ez.analog.com/community/fpga