a0039ed4fe
The ADV7511 captures data on the rising edge, so make sure to launch data on the falling edge. This fixes some issues with image stability. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
||
---|---|---|
library | ||
projects | ||
.gitattributes | ||
.gitignore | ||
LICENSE | ||
Makefile | ||
README.md |
README.md
#HDL Reference Designs
Analog Devices HDL libraries and projects
###Tools version:
- Xilinx : Vivado 2015.2.1
- Altera : Quartus 15.0
###Documentation and support
For first time users, it is highly recommended to go through our HDL user guide.
For support please visit our FPGA Reference Designs Support Community on EngineerZone.