Lars-Peter Clausen b58a5c37eb m2k: Reduce AXI interconnect utilization ... Use the new axi_rd_wr_combiner module to ... the read and write DMA interfaces into a single interface. This allows the AXI interconnect completely optimize itself away and reduce the overall resource utilization of the project. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>		2017-04-18 12:17:39 +02:00
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Makefile	m2k: Reduce AXI interconnect utilization	2017-04-18 12:17:39 +02:00
system_bd.tcl	m2k: Disabled DDS cores for the generic project	2017-02-28 10:10:28 +02:00
system_constr.xdc	m2k: Connected data[0] and trigger[0] pins to the logic analyzer clock generator input 2	2017-02-27 14:16:32 +02:00
system_project.tcl	m2k: Standalone, ignored critical warning for contraints that should only be applied at the implementation stage	2017-02-27 14:17:29 +02:00
system_top.v	m2k: standalone: Assign 0 to unused GPIO inputs	2017-03-30 11:16:25 +02:00