pluto_hdl_adi/projects/adrv9371x/common
Laszlo Nagy e2c75c015f axi_dmac: add tlast to the axis interface for Intel
This change adds the TLAST signal to the AXI streaming interface
of the source side for Intel targets.
Xilinx based designs already have this since the tlast is part of the
interface definition.

In order to make the signal optional and let the tool connect a
default value to the it, the USE_TLAST_SRC/DEST parameter is
added to the configuration UI. This conditions the tlast port on
the interface of the DMAC.

Xilinx handles the optional signals much better so the parameter
is not required there.
2018-07-06 16:30:30 +03:00
..
adrv9371x_bd.tcl adrv9371x: Set up the defualt clock output control 2018-04-11 15:09:54 +03:00
adrv9371x_qsys.tcl axi_dmac: add tlast to the axis interface for Intel 2018-07-06 16:30:30 +03:00