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AndreiGrozav fa6f45a406 adrv936x, fmcomms2/5, usrpe31x: Fix warning on the dac path 
Fix warnining regarding SYNC_TRANSFER_START parameter which doesn't
apply when the axi_dmac is configured for the tx path.
 		2018-08-20 14:29:57 +03:00
..
ccbob_cmos all/system_top.v: drive unused gpio inputs with zero 2018-08-10 17:00:11 +03:00
ccbob_lvds all/system_top.v: drive unused gpio inputs with zero 2018-08-10 17:00:11 +03:00
ccbox_lvds all/system_top.v: drive unused gpio inputs with zero 2018-08-10 17:00:11 +03:00
common adrv936x, fmcomms2/5, usrpe31x: Fix warning on the dac path 2018-08-20 14:29:57 +03:00
Makefile Regenerate project top-level Makefiles 2018-04-11 15:09:54 +03:00
README.md adrv936x- readme updates 2017-08-08 15:18:43 -04:00

README.md

ADRV9364Z7020 SDR SOM

This folder contains the ADRV9364Z7020 SOM projects for each of the carrier boards.

Supported SOM & Carriers

Directory Description
ccbob_cmos ADRV9364Z7020-SOM (CMOS Mode) + ADRV1CRR-BOB
ccbob_lvds ADRV9364Z7020-SOM (LVDS Mode) + ADRV1CRR-BOB
ccbox_lvds ADRV9364Z7020-SOM (LVDS Mode) + ADRV1CRR-BOX
ccusb_lvds ADRV9364Z7020-SOM (LVDS Mode) + ADRV1CRR-USB

Board Design Files (Vivado IPI)

Directory/File Description
common/ADRV9364Z7020_bd.tcl ADRV9364Z7020-SOM board design file.
common/ccbob_bd.tcl carrier, break out board design file.
common/ccbox_bd.tcl carrier, box board design file.
common/ccusb_bd.tcl carrier, usb board design file.

FMC & BOB carrier designs includes loopback daughtercards for connectivity testing.

Board Constraint Files (pin-out & io-standard)

Directory/File Description
common/ADRV9364Z7020_constr.xdc ADRV9364Z7020-SOM base constraints file.
common/ADRV9364Z7020_constr_cmos.xdc ADRV9364Z7020-SOM CMOS mode constraints file.
common/ADRV9364Z7020_constr_lvds.xdc ADRV9364Z7020-SOM LVDS mode constraints file.
common/ccbob_constr.xdc carrier, break out board constraints file.
common/ccbox_constr.xdc carrier, box board constraints file.
common/ccusb_constr.xdc carrier, usb board constraints file.

FMC & BOB carrier designs includes loopback daughtercards for connectivity testing.

Building, Generating Bit Files (easy & efficient method)

[some-directory]> git clone -b dev git@github.com:analogdevicesinc/hdl.git
[some-directory]> make -C hdl/projects/adrv9364z7020/ccbob_cmos

Building, Generating Elf Files (easy & efficient method)

[some-directory]> git clone -b dev git@github.com:analogdevicesinc/no-OS.git
[some-directory]> make -C no-OS/adrv9364z7020/ccbob_cmos

Running, a quick test (easy & efficient method)

[some-directory]> make -C no-OS/adrv9364z7020/ccbob_cmos run

Documentation