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pluto_hdl_adi/projects/dac_fmc_ebz/zc706
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Iulia Moldovan 961ebe0cc2 projects: Update .v files according to guideline 
Deleted lines after endmodule and consecutive empty lines.
Modified parentheses, extra spaces.
Fixed indentation.
Fixed parameters list to be each parameter on its line.

Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com>
 		2022-06-28 18:06:56 +03:00
..
Makefile Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
README.md dac_fmc_ebz: added README 2019-06-06 11:45:05 +03:00
system_bd.tcl sysid: Upgrade framework, header/ip are now at 2/1.1.a 2021-01-20 01:02:56 +02:00
system_constr.xdc dac_fmc_ebz_bd.tcl: Updated bd for multiple tx_ref_clk 2022-02-08 14:34:17 +02:00
system_project.tcl library: Move ad_iobuf to the common library, as it's not Xilinx specific 2020-11-02 16:13:35 +02:00
system_top.v projects: Update .v files according to guideline 2022-06-28 18:06:56 +03:00

README.md

AD-DAC-FMC-EBZ reference HDL design for ZC706
Wiki https://wiki.analog.com/resources/eval/user-guides/ad-dac-fmc-ebz
FMC Location FMC HPC Slot
Configuration file ../common/config.tcl