961ebe0cc2
Deleted lines after endmodule and consecutive empty lines. Modified parentheses, extra spaces. Fixed indentation. Fixed parameters list to be each parameter on its line. Signed-off-by: Iulia Moldovan <iulia.moldovan@analog.com> |
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Readme.md |
Readme.md
AD7768EVB HDL Project
Here are some pointers to help you:
- Board Product Page
- Board Product Page
- Parts : DC to 204 kHz, Dynamic Signal Analysis, Precision 24-Bit ADC with Power Scaling
- Parts : 8-Channel, 24-Bit, Simultaneous Sampling ADC, Power Scaling, 110.8 kHz BW
- Project Doc: https://wiki.analog.com/resources/eval/user-guides/ad7768-ebz/software/baremetal
- HDL Doc: https://wiki.analog.com/resources/eval/user-guides/ad7768-ebz/software/baremetal
- Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers/iio-adc/ad7768