95c98c634e
Move the transfer logic, including the 2d module, into its own sub-module. This allows testing of the full transfer logic independently of the register map logic. The top-level module now only instantiates the register map and transfer module, but does not have any logic on its own. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
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| .. | ||
| axi_read_slave.v | ||
| axi_slave.v | ||
| axi_write_slave.v | ||
| dma_read_tb | ||
| dma_read_tb.v | ||
| dma_write_tb | ||
| dma_write_tb.v | ||
| regmap_tb | ||
| regmap_tb.v | ||
| run_tb.sh | ||
| tb_base.v | ||