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pluto_hdl_adi/library/axi_dmac
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Lars-Peter Clausen 95c98c634e axi_dmac: Split transfer handling into separate sub-module 
Move the transfer logic, including the 2d module, into its own sub-module.
This allows testing of the full transfer logic independently of the
register map logic.

The top-level module now only instantiates the register map and transfer
module, but does not have any logic on its own.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2018-07-03 13:44:34 +02:00
..
bd axi_dmac: Limit MAX_BYTES_PER_BURST to maximum supported value 2018-04-24 12:49:24 +02:00
tb axi_dmac: Split transfer handling into separate sub-module 2018-07-03 13:44:34 +02:00
2d_transfer.v axi_dmac: 2d_transfer: Remove resets from data path 2018-06-05 14:28:40 +02:00
Makefile axi_dmac: Split transfer handling into separate sub-module 2018-07-03 13:44:34 +02:00
address_generator.v axi_dmac: address_generator: Remove resets from data path 2018-06-05 14:28:40 +02:00
axi_dmac.v axi_dmac: Split transfer handling into separate sub-module 2018-07-03 13:44:34 +02:00
axi_dmac_constr.sdc axi_dmac: Be more specific about debug register timing exceptions 2018-06-13 10:12:22 +02:00
axi_dmac_constr.ttcl axi_dmac: Revert EOT memory to FIFO structure 2018-06-05 14:28:40 +02:00
axi_dmac_hw.tcl axi_dmac: Split transfer handling into separate sub-module 2018-07-03 13:44:34 +02:00
axi_dmac_ip.tcl axi_dmac: Split transfer handling into separate sub-module 2018-07-03 13:44:34 +02:00
axi_dmac_regmap.v axi_dmac: made vlog pass 2018-05-03 14:49:06 +02:00
axi_dmac_regmap_request.v axi_dmac: Split register map into separate sub-module 2018-05-03 14:49:06 +02:00
axi_dmac_transfer.v axi_dmac: Split transfer handling into separate sub-module 2018-07-03 13:44:34 +02:00
axi_register_slice.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
data_mover.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
dest_axi_mm.v axi_dmac: Remove unused pause signal from address generator 2018-04-11 15:09:54 +03:00
dest_axi_stream.v axi_dmac: dest_axi_stream: Remove outdated comment 2018-06-05 14:28:40 +02:00
dest_fifo_inf.v axi_dmac: Fix some indentation errors 2018-04-11 15:09:54 +03:00
inc_id.h axi_dmac: Fix some data width mismatches 2017-08-01 15:22:29 +02:00
request_arb.v axi_dmac: Revert EOT memory to FIFO structure 2018-06-05 14:28:40 +02:00
request_generator.v axi_dmac: request_generator: Remove reset from data path 2018-06-05 14:28:40 +02:00
resp.h Added axi_dmac, axi_fifo and misc files in library 2014-03-06 18:16:02 +02:00
response_generator.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
response_handler.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
splitter.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
src_axi_mm.v axi_dmac: Remove unused pause signal from address generator 2018-04-11 15:09:54 +03:00
src_axi_stream.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00
src_fifo_inf.v license: Fix a spelling mistake 2018-04-11 15:09:54 +03:00