Michael Hennerich 2e59a70cdd adrv9371: Increase FCLK2 to 200MHz to support max sampling rates ... This fixes an issue seen when using 307.2 MSPS on the Observation RX. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>		2018-01-09 15:20:06 +01:00
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Makefile	[axi|avl]_dacfifo: Create a separate bypass module for altera/xilinx	2017-09-25 08:56:40 +01:00
system_bd.tcl	adrv9371: Increase FCLK2 to 200MHz to support max sampling rates	2018-01-09 15:20:06 +01:00
system_constr.xdc	axi_adrv9371/zc706: Constraints update	2016-11-11 10:35:09 +02:00
system_project.tcl	scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects	2017-06-07 12:06:50 +03:00
system_top.v	Connect JESD204 interrupts	2017-07-05 14:37:50 +02:00