Istvan Csomortani 4026f2d414 daq2/zc706: PL DDR size is 1GByte		2021-08-06 11:55:24 +03:00
..
Makefile	daq2: Integrate data_offload	2021-08-06 11:55:24 +03:00
system_bd.tcl	daq2/zc706: PL DDR size is 1GByte	2021-08-06 11:55:24 +03:00
system_constr.xdc	daq2- adxcvr version	2016-07-21 16:09:33 -04:00
system_project.tcl	library: Move ad_iobuf to the common library, as it's not Xilinx specific	2020-11-02 16:13:35 +02:00
system_top.v	daq2: Integrate data_offload	2021-08-06 11:55:24 +03:00