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axi_ad5766
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up_axi_update: ADDRESS_WIDTH parameter is now a localparam
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2019-07-26 11:58:58 +03:00 |
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axi_ad6676
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axi_ad6676: Set data format to twos complement
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2020-10-13 12:55:17 +03:00 |
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axi_ad7616
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axi_ad7616: Update ad_edge_detect port names
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2020-10-28 11:31:50 +02:00 |
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axi_ad9122
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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axi_ad9144
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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axi_ad9152
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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axi_ad9162
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Fix copy-paste typo in *_ip.tcl
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2019-07-29 15:37:30 +03:00 |
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axi_ad9250
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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axi_ad9265
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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axi_ad9361
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axi_ad9361: Fix typo in tdd interface
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2021-06-14 16:50:47 +03:00 |
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axi_ad9371
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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axi_ad9434
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Fix copy-paste typo in *_ip.tcl
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2019-07-29 15:37:30 +03:00 |
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axi_ad9467
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axi_ad9467: Fix missing connection warnings
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2020-09-11 10:24:22 +03:00 |
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axi_ad9625
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Fix copy-paste typo in *_ip.tcl
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2019-07-29 15:37:30 +03:00 |
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axi_ad9671
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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axi_ad9680
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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axi_ad9684
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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axi_ad9739a
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ad_serdes_out: Add tristate option
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2020-08-07 08:31:19 +03:00 |
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axi_ad9963
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axi_ad9963: Add last sample hold support
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2020-11-02 15:50:12 +02:00 |
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axi_adc_decimate
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axi_adc_decimate: Export signals indicating the rate
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2020-08-13 07:01:19 +03:00 |
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axi_adc_trigger
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axi_adc_trigger: Use valid in data delay stage
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2020-08-13 07:01:19 +03:00 |
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axi_adrv9001
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adrv9001: fixes for reset metastability on xilinx ioserdes
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2021-07-09 11:11:04 +03:00 |
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axi_adrv9009
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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axi_clkgen
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library/axi_clkgen: Fix second clock output
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2020-01-07 13:21:00 +02:00 |
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axi_dac_interpolate
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axi_dac_interpolate: Add last sample support
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2020-11-02 15:50:12 +02:00 |
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axi_dmac
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axi_dmac: Restore axi_dmac_regmap_request to f7b8a2d version
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2021-07-02 15:52:48 +03:00 |
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axi_fan_control
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axi_fan_control: Fixed reset bug
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2020-05-08 17:07:57 +03:00 |
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axi_fmcadc5_sync
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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axi_generic_adc
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axi_generic_adc: pass in number of channels instantiated to up_adc_common. Allows drivers/iio/adc/ad_adc.c driver to be used with this core.
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2021-08-02 13:10:26 +03:00 |
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axi_gpreg
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makefile: Regenerate make files
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2020-10-20 12:51:10 +03:00 |
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axi_hdmi_rx
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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axi_hdmi_tx
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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axi_i2s_adi
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axi_i2s_adi: create friendly xgui files
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2020-08-25 09:55:31 +03:00 |
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axi_intr_monitor
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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axi_laser_driver
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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axi_logic_analyzer
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axi_logic_analyzer: Fix data width warning
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2020-09-11 10:23:26 +03:00 |
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axi_mc_controller
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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axi_mc_current_monitor
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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axi_mc_speed
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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axi_pulse_gen
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axi_pulse_gen: Fix typo introduced in c235e5e58
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2021-05-10 13:26:30 +03:00 |
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axi_pwm_gen
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axi_pwm_gen: Fix offset mechanism
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2021-07-13 15:49:42 +03:00 |
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axi_rd_wr_combiner
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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axi_spdif_rx
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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axi_spdif_tx
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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axi_sysid
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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axi_tdd
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axi_tdd: Add standalone axi_tdd IP core
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2021-06-26 08:27:54 +03:00 |
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axi_usb_fx3
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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cn0363
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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common
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ad_axis_inf_rx: Initialize output ports to avoid X propagation in simulation
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2021-08-06 11:55:24 +03:00 |
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cordic_demod
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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data_offload
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data_offload: Initial commit
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2021-08-06 11:55:24 +03:00 |
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intel
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adi_jesd204: Add support of 16 lanes
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2021-07-27 10:28:48 +03:00 |
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interfaces
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interfaces: Add XFER_REQ to fifo_rd_rtl.xml
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2021-08-06 11:55:24 +03:00 |
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jesd204
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Fix width of device_cfg_octets_per_multiframe
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2021-07-27 11:34:34 +03:00 |
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scripts
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Update Vivado version to 2020.2
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2021-07-29 14:06:42 +03:00 |
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spi_engine
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axi_spi_engine: almost full and almost empty is generated by the util_axis_fifo
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2021-03-18 18:53:35 +02:00 |
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sysid_rom
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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util_adcfifo
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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util_axis_fifo
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util_axis_fifo: Improve GUI layout in Vivado
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2021-03-12 15:06:45 +02:00 |
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util_axis_fifo_asym
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util_axis_fifo_asym: Initial commit
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2021-08-03 23:02:17 +03:00 |
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util_axis_resize
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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util_axis_upscale
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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util_bsplit
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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util_cdc
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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util_cic
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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util_dacfifo
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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util_dec256sinc24b
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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util_delay
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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util_extract
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util_extract: Use less delays in axi_adc_trigger
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2019-08-22 18:06:10 +03:00 |
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util_fifo2axi_bridge
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util_fifo2axi_bridge: Initial commit
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2021-08-03 23:02:17 +03:00 |
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util_fir_dec
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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util_fir_int
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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util_gmii_to_rgmii
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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util_i2c_mixer
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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util_mfifo
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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util_pack
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Testbenches: Unify and optimize HDL testbenches
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2021-05-07 19:53:14 +03:00 |
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util_pulse_gen
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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util_rfifo
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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util_sigma_delta_spi
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util_sigma_delta_spi: Fix syntax
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2020-10-19 10:45:36 +03:00 |
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util_tdd_sync
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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util_var_fifo
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library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl
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2019-06-29 06:53:51 +03:00 |
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util_wfifo
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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xilinx
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Update Vivado version to 2020.2
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2021-07-29 14:06:42 +03:00 |
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Makefile
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data_offload: Initial commit
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2021-08-06 11:55:24 +03:00 |
86b611c1f7