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Lars-Peter Clausen 8557073b56 axi_dmac: Hide fifo_wr bus when source type is not the fifo interface 
Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2014-10-10 16:25:33 +03:00
library axi_dmac: Hide fifo_wr bus when source type is not the fifo interface 2014-10-10 16:25:33 +03:00
projects fmcomms2: Connect DMA directly to the HP ports 2014-10-10 16:25:14 +03:00
.gitignore a5soc: increase pipeline for qsys 2014-05-04 10:38:53 -04:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
README.md Add a link to EngineerZone 2014-04-15 10:25:18 +03:00

README.md

hdl

Analog Devices HDL libraries and projects

First time users, it is highly recommended to go through our HDL user guide at the following url:

http://wiki.analog.com/resources/fpga/docs/hdl

For support please visit our FPGA Reference Designs Support Community on EngineerZone:

http://ez.analog.com/community/fpga