Lars-Peter Clausen 2d896c0729 jesd204: Add Altera/Intel IP support ... Add Qsys IP scripts as well as SDC constraint files for the ADI JESD204 peripherals. This allows them to be instantiated and used on Altera/Intel platforms. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>		2017-08-21 11:09:42 +02:00
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Makefile	Partially revert "hdlmake.pl - updates"	2017-07-21 15:06:22 +02:00
align_mux.v	Add ADI JESD204 link layer cores	2017-05-23 11:16:07 +02:00
elastic_buffer.v	Add ADI JESD204 link layer cores	2017-05-23 11:16:07 +02:00
ilas_monitor.v	Add ADI JESD204 link layer cores	2017-05-23 11:16:07 +02:00
jesd204_rx_constr.sdc	jesd204: Add Altera/Intel IP support	2017-08-21 11:09:42 +02:00
jesd204_rx_constr.xdc	Add ADI JESD204 link layer cores	2017-05-23 11:16:07 +02:00
jesd204_rx_hw.tcl	jesd204: Add Altera/Intel IP support	2017-08-21 11:09:42 +02:00
jesd204_rx_ip.tcl	jesd204: Slightly rework sysref handling	2017-06-20 17:39:41 +02:00
lane_latency_monitor.v	jesd204: Add names for generate for-blocks	2017-07-17 17:13:02 +02:00
rx.v	jesd204: Add names for generate for-blocks	2017-07-17 17:13:02 +02:00
rx_cgs.v	Add ADI JESD204 link layer cores	2017-05-23 11:16:07 +02:00
rx_ctrl.v	Add ADI JESD204 link layer cores	2017-05-23 11:16:07 +02:00
rx_lane.v	jesd204: Add names for generate for-blocks	2017-07-17 17:13:02 +02:00