AndreiGrozav ce04f46b80 motcon2_zed: Fix timing problems ... -change implementation strategy -axi_dmac add extra registers AXI_SLICE_SRC This was done to increase the overall timing margin.		2019-02-12 10:43:46 +02:00
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motcon2_fmc_bd.tcl	motcon2_zed: Fix timing problems	2019-02-12 10:43:46 +02:00