7986310fa0
FPGAs support different widths for the read and write port of the block SRAM cells. The DMAC can make use of this feature when the source and destination interface have a different width to up-size/down-size the data bus. Using memory cells with asymmetric port width consumes the same amount of SRAM cells, but allows to bypass the re-size blocks inside the DMAC that are otherwise used for up- and down-sizing. This reduces overall resource usage and can improve timing. If the ratio between the destination and source port is too larger to be handled by SRAM alone the SRAM block will be configured to do partial up- or down-sizing and a resize block will be inserted to take care of the remaining up-/down-sizing. E.g. if a 256-bit interface is connected to a 32-bit interface the SRAM will be used to do an initial resizing of 256 bit to 64 bit and a resize block will be used to do the remaining resizing from 64 bit to 32 bit. Currently this feature is disabled for Intel FPGAs since Quartus does not properly infer a block RAM with different read and write port widths from the current ad_asym_mem module. Once that has been resolved support for asymmetric memories can also be enabled in the DMAC. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
||
|---|---|---|
| library | ||
| projects | ||
| .gitattributes | ||
| .gitignore | ||
| LICENSE | ||
| LICENSE_ADIBSD | ||
| LICENSE_GPL2 | ||
| LICENSE_LGPL | ||
| Makefile | ||
| README.md | ||
| quiet.mk | ||
README.md
HDL Reference Designs
Analog Devices Inc. HDL libraries and projects.
Getting started
This repository supports reference designs for different Analog Devices boards based on Intel and Xilinx FPGA development boards or standalone.
Prerequisites
or
Please make sure that you have the required tool version.
How to build a project
For building a projects, you have to use the GNU Make tool. If you're a Windows user please checkout this page, to see how you can install this tool.
To build a project, checkout the latest release, after that just cd to the project that you want to build and run make:
[~]cd projects/fmcomms2/zc706
[~]make
A more comprehensive build guide can be found under the following link: https://wiki.analog.com/resources/fpga/docs/build
Software
In general all the projects have no-OS (baremetal) and a Linux support. See no-OS or Linux for more information.
Which branch should I use?
-
If you want to use the most stable code base, always use the latest release branch.
-
If you want to use the greatest and latest, check out the master branch.
License
In this HDL repository, there are many different and unique modules, consisting of various HDL (Verilog or VHDL) components. The individual modules are developed independently, and may be accompanied by separate and unique license terms.
The user should read each of these license terms, and understand the freedoms and responsibilities that he or she has by using this source/core.
See LICENSE for more details. The separate license files cab be found here:
Comprehensive user guide
See HDL User Guide for a more detailed guide.
Support
Feel free to ask any question at EngineerZone.