pluto_hdl_adi/projects/fmcomms2/common
Istvan Csomortani 7960b00684 block_design: Update with new clock net variables
Using the new clock net variables in all Xilinx block designs.
2019-06-11 18:13:06 +03:00
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fmcomms2_bd.tcl block_design: Update with new clock net variables 2019-06-11 18:13:06 +03:00
fmcomms2_qsys.tcl altera- infer latest versions 2017-05-12 13:40:14 -04:00