Istvan Csomortani 7960b00684 block_design: Update with new clock net variables ... Using the new clock net variables in all Xilinx block designs.		2019-06-11 18:13:06 +03:00
..
a10gx	adrv9371: update adcfifo/dacfifo	2019-01-23 14:45:45 +02:00
a10soc	whitespace: Delete all trailing white spaces	2019-06-07 10:20:15 +03:00
common	block_design: Update with new clock net variables	2019-06-11 18:13:06 +03:00
kcu105	block_design: Update with new clock net variables	2019-06-11 18:13:06 +03:00
zc706	block_design: Update with new clock net variables	2019-06-11 18:13:06 +03:00
zcu102	Remove deprecated/unused parameters	2019-03-30 11:26:11 +02:00
Makefile	Regenerate project top-level Makefiles	2018-04-11 15:09:54 +03:00