Adrian Costina fcc185d769 Makefile: Updated makefiles ... - removed up_drp_control, up_delay_control dependencies where not needed - added axi_jesd_gt core in the library makefile - fixed timing tcl dependency for altera projects		2015-06-25 14:59:34 +03:00
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Makefile	Makefile: Updated makefiles	2015-06-25 14:59:34 +03:00
axi_ad9671.v	library- drp moved to up-clock domain	2015-06-01 14:52:52 -04:00
axi_ad9671_channel.v	up/constr: independent read/write and local constraints	2014-10-02 14:35:59 -04:00
axi_ad9671_constr.xdc	axi_ad9671: Added CDC and reset constraints	2015-04-23 10:39:11 +03:00
axi_ad9671_hw.tcl	ad_rst- non lpm version	2015-06-04 10:53:12 -04:00
axi_ad9671_if.v	axi_ad9671: Updated port names. Fixed synchronization of the rx_sof with the ad_jesd_align module, so that data valid is assigned correctly	2015-05-23 00:16:27 +03:00
axi_ad9671_ip.tcl	library: remove drp cntrl	2015-06-02 09:58:57 -04:00
axi_ad9671_pnmon.v	Remove executable flags from non-exectuable files	2014-09-09 15:05:06 +02:00