zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
pluto_hdl_adi/projects/ad6676evb
History
Dan Hotoleanu e8ff32d6df ad6676evb: Parameterize JESD204 configuration values 
Added the capability to set the JESD204 configuration values from a single
point in the code and to modify these default settings from the command
line for the Xilinx FPGAs in the project.

Signed-off-by: Dan Hotoleanu <dan.hotoleanu@analog.com>
 		2022-01-31 10:36:31 +02:00
..
common ad6676evb: Parameterize JESD204 configuration values 2022-01-31 10:36:31 +02:00
vc707 ad6676evb: Parameterize JESD204 configuration values 2022-01-31 10:36:31 +02:00
zc706 ad6676evb: Parameterize JESD204 configuration values 2022-01-31 10:36:31 +02:00
Makefile Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
Readme.md start adding some doc to the ./projects directory 2021-11-10 14:01:06 +02:00

Readme.md

AD6676-EVB HDL Project

Here are some pointers to help you: