28 lines
720 B
Tcl
28 lines
720 B
Tcl
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source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl
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source $ad_hdl_dir/projects/scripts/adi_pd.tcl
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# specify the spi reference clock frequency in MHz
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set spi_clk_ref_frequency 160
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# specify ADC resolution -- supported resolutions 16 bits
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set adc_resolution 16
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# specify ADC sampling rate in samples/seconds
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set adc_sampling_rate 1000000
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adi_project_files ad469x_fmc_zed [list \
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"../../../library/common/ad_edge_detect.v" \
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"../../../library/util_cdc/sync_bits.v" \
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]
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source ../common/ad469x_bd.tcl
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#system ID
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ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
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ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/mem_init_sys.txt"
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ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9
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sysid_gen_sys_init_file
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