pluto_hdl_adi/library/axi_dac_interpolate
Lars-Peter Clausen 508a783f39 axi_dac_interpolate: Register output mux signal
The output data mux is used to bypass the filter when it is not used. Which
setting is used for the mux depends on the 3-bit filter_mask signal.
Registering the control logic into a single bit signal reduces the amount
of routing resources required. Since changing the filter_mask settings is
asynchronous to the processing anyway the extra clock cycle delay
introduced by this change does not affect behaviour.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-04-18 12:17:40 +02:00
..
Makefile axi_dac_interpolate: Initial commit 2017-01-31 16:22:49 +02:00
axi_dac_interpolate.v axi_dac_interpolate: Reduce filter_mask signal width 2017-04-18 12:17:40 +02:00
axi_dac_interpolate_constr.xdc axi_dac_interpolate: Make dac_reset external 2017-04-18 12:17:39 +02:00
axi_dac_interpolate_filter.v axi_dac_interpolate: Register output mux signal 2017-04-18 12:17:40 +02:00
axi_dac_interpolate_ip.tcl axi_dac_interpolate: Move processing pipeline to own sub-module 2017-04-18 12:17:40 +02:00
axi_dac_interpolate_reg.v axi_dac_interpolate: Reduce filter_mask signal width 2017-04-18 12:17:40 +02:00
cic_interp.v axi_dac_interpolate: Initial commit 2017-01-31 16:22:49 +02:00
fir_interp.v axi_dac_interpolate: Initial commit 2017-01-31 16:22:49 +02:00