Istvan Csomortani a66029aef3 adrv9009/a10gx: Delete redundant timing constraints		2020-08-11 10:14:18 +03:00
..
Makefile	all: Rename altera to intel	2019-06-29 06:53:51 +03:00
system_constr.sdc	adrv9009/a10gx: Delete redundant timing constraints	2020-08-11 10:14:18 +03:00
system_project.tcl	project/scripts: Rename adi_project_alt.tcl to adi_project_intel.tcl	2019-06-29 06:53:51 +03:00
system_qsys.tcl	all: Rename altera to intel	2019-06-29 06:53:51 +03:00
system_top.v	adrv9009: A10GX: Initial commit	2018-11-27 15:31:21 +02:00