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Istvan Csomortani 6197a82c80 fmcomms2/common: Add the util_tdd_sync module 2015-11-11 11:07:15 +02:00
library axi_ad9361: Delete the old sync generator from the core 2015-11-11 11:06:19 +02:00
projects fmcomms2/common: Add the util_tdd_sync module 2015-11-11 11:07:15 +02:00
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README.md README.md: Update Vivado's version number 2015-09-29 15:11:10 +03:00

README.md

#HDL Reference Designs

Analog Devices HDL libraries and projects

###Tools version:

###Documentation and support

For first time users, it is highly recommended to go through our HDL user guide.

For support please visit our FPGA Reference Designs Support Community on EngineerZone.