Istvan Csomortani ac2e5a9dac constraints: Update constraints ... Xilinx recommends that all synchronizer flip-flops have their ASYNC_REG property set to true in order to preserve the synchronizer cells through any logic optimization during synthesis and implementation.		2017-02-24 13:43:32 +02:00
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Makefile	updated makefiles	2016-12-09 23:06:41 +02:00
util_wfifo.v	util_wfifo: read after write is complete	2016-07-11 09:59:31 -04:00
util_wfifo_constr.sdc	util_wfifo: read after write is complete	2016-07-11 09:59:31 -04:00
util_wfifo_constr.xdc	constraints: Update constraints	2017-02-24 13:43:32 +02:00
util_wfifo_hw.tcl	rfifo/wfifo- qsys ip	2016-05-18 13:24:13 -04:00
util_wfifo_ip.tcl	Add .gitattributes file	2015-06-26 11:07:10 +02:00