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Lars-Peter Clausen 582ea06918 axi_dmac: request_generator: Stop generating requests when disabled 
Currently when the DMAC gets disabled the request_generator will still
generate all remaining burst requests for the currently active transfer.
While these requests will be ignored by the source and destination component
this can still take a fair amount of time for long transfers.

So just stop generating burst requests once the DMAC is being disabled.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2015-02-19 17:22:23 +01:00
library axi_dmac: request_generator: Stop generating requests when disabled 2015-02-19 17:22:23 +01:00
projects rfsom: schematic changes 2015-02-18 14:32:41 -05:00
.gitignore a5soc: increase pipeline for qsys 2014-05-04 10:38:53 -04:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
README.md README.md: General update 2015-01-29 12:46:19 +02:00

README.md

hdl

Analog Devices HDL libraries and projects

Tools version:

  • Vivado 2014.4
  • Quartus 14.0

First time users, it is highly recommended to go through our HDL user guide at the following url:

http://wiki.analog.com/resources/fpga/docs/hdl

For support please visit our FPGA Reference Designs Support Community on EngineerZone:

http://ez.analog.com/community/fpga