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pluto_hdl_adi/library/jesd204/axi_jesd204_rx
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Lars-Peter Clausen dd1b1c89f9 jesd204: jesd204_rx: Don't expose internal states on the status interface 
The DEGLITCH state of the RX state machine is a workaround for misbehaving
PHYs. It is an internal state and an implementation detail and it does not
really make sense to report through the status interface.

Rework things so that DEGLITCH state is reported as part of the CGS state
on the external status interface.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2017-08-24 17:42:44 +02:00
..
Makefile
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axi_jesd204_rx.v jesd204: jesd204_rx: Don't expose internal states on the status interface 2017-08-24 17:42:44 +02:00
axi_jesd204_rx_constr.sdc jesd204: Add Altera/Intel IP support 2017-08-21 11:09:42 +02:00
axi_jesd204_rx_constr.xdc
…
axi_jesd204_rx_hw.tcl jesd204: jesd204_rx: Don't expose internal states on the status interface 2017-08-24 17:42:44 +02:00
axi_jesd204_rx_ip.tcl jesd204: axi_jesd204_{rx,tx}: Add external link domain reset 2017-08-18 18:25:12 +02:00
jesd204_up_ilas_mem.v
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jesd204_up_rx.v jesd204: jesd204_rx: Don't expose internal states on the status interface 2017-08-24 17:42:44 +02:00
jesd204_up_rx_lane.v jesd204: ilas_mem: Rework to be more Altera friendly 2017-08-21 11:05:16 +02:00