AndreiGrozav 3c83694755 adi_fir_filter_bd.tcl: Synchronize the control GPIO input to the core clock		2019-12-03 17:27:56 +02:00
..
a10gx	a10gx: Optimise the base design	2019-06-04 11:28:37 +03:00
a10soc	a10soc_system_qsys: sys_dma_clk clock_source inherit its clock frequency from its source	2019-10-02 15:32:17 +03:00
ac701	system_id: deployed ip	2019-08-06 16:53:11 +03:00
c5soc	Remove executable flag from non-executable files	2017-07-28 17:56:07 +02:00
coraz7s	coraz7s: Initial commit	2019-11-15 14:35:00 +02:00
de10	DE10: Initial commit	2018-04-11 15:09:54 +03:00
intel	adi_env: Update system level environment variable definition	2019-07-22 11:00:45 +03:00
kc705	system_id: deployed ip	2019-08-06 16:53:11 +03:00
kcu105	system_id: deployed ip	2019-08-06 16:53:11 +03:00
microzed	system_id: deployed ip	2019-08-06 16:53:11 +03:00
vc707	system_id: deployed ip	2019-08-06 16:53:11 +03:00
vcu118	common:vcu118: move system memory to DDR C2	2019-11-28 16:17:44 +02:00
xilinx	adi_fir_filter_bd.tcl: Synchronize the control GPIO input to the core clock	2019-12-03 17:27:56 +02:00
zc702	zynq:all: fix SPI clock constraint	2019-08-09 16:39:56 +03:00
zc706	zynq:all: fix SPI clock constraint	2019-08-09 16:39:56 +03:00
zcu102	zynq:all: fix SPI clock constraint	2019-08-09 16:39:56 +03:00
zed	zynq:all: fix SPI clock constraint	2019-08-09 16:39:56 +03:00