Lars-Peter Clausen 61be003017 axi_i2s/axi_spdif: Create clock and reset interface for DMA bus ... This avoids some critical warnings from Vivado that the DMA bus does not has any associated clocks. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>		2014-10-10 16:11:41 +03:00
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axi_i2s_adi.vhd	Remove BASEADDR/HIGHADDR parameters	2014-09-11 12:26:37 +02:00
axi_i2s_adi_ip.tcl	axi_i2s/axi_spdif: Create clock and reset interface for DMA bus	2014-10-10 16:11:41 +03:00
fifo_synchronizer.vhd	initial checkin	2014-02-28 14:26:22 -05:00
i2s_clkgen.vhd	initial checkin	2014-02-28 14:26:22 -05:00
i2s_controller.vhd	initial checkin	2014-02-28 14:26:22 -05:00
i2s_rx.vhd	initial checkin	2014-02-28 14:26:22 -05:00
i2s_tx.vhd	initial checkin	2014-02-28 14:26:22 -05:00