55d4215f45
Add documentation info to the README.md
At adi_hdl_parser.py, filter "_signal_clock" and "_signal_reset"
pseudo buses from component.xml files, append them as description
in the ports table, in the format
"{Bus} [...] is synchronous to this {domain}".
Also, adds collapsible directive
Signed-off-by: Jorge Marques <jorge.marques@analog.com>
|
||
|---|---|---|
| .. | ||
| sources | ||
| docs_guidelines.rst | ||
| index.rst | ||
| porting_project.rst | ||