zcy
/
pluto_hdl_adi
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity
pluto_hdl_adi/projects/cn0561/coraz7s
History
sergiu arpadi 0ac49027bd cn0561_coraz7s: Initial commit 
Because the inferface signals which pass through the eval board's
Arduino connector are connected to level shifters the design
will not work at the maximum clk frequency of 48MHz. The maximum
tested frequency is 24MHz.
 		2022-05-11 17:30:26 +03:00
..
Makefile cn0561_coraz7s: Initial commit 2022-05-11 17:30:26 +03:00
system_bd.tcl cn0561_coraz7s: Initial commit 2022-05-11 17:30:26 +03:00
system_constr.xdc cn0561_coraz7s: Initial commit 2022-05-11 17:30:26 +03:00
system_project.tcl cn0561_coraz7s: Initial commit 2022-05-11 17:30:26 +03:00
system_top.v cn0561_coraz7s: Initial commit 2022-05-11 17:30:26 +03:00