Laszlo Nagy 0261eade0c zynq:all: fix SPI clock constraint ... According to data sheets the EMIO SPI controller maximum frequency is just 25MHz. Constrain the SPI clock accordingly.		2019-08-09 16:39:56 +03:00
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common	m2k: Remove memory interconnects and connect directly to the HP ports	2019-04-15 17:49:11 +03:00
standalone	zynq:all: fix SPI clock constraint	2019-08-09 16:39:56 +03:00
Makefile	Regenerate project top-level Makefiles	2018-04-11 15:09:54 +03:00