Istvan Csomortani 79b6ba29ce all: Rename altera to intel		2019-06-29 06:53:51 +03:00
..
Makefile	all: Rename altera to intel	2019-06-29 06:53:51 +03:00
util_dacfifo.v	util_dacfifo: Align the dac_xfer_out to the first valid data	2018-10-11 16:57:30 +03:00
util_dacfifo_bypass.v	util_dacfifo: Delete unused registers	2018-10-16 10:29:37 +03:00
util_dacfifo_constr.sdc	util_dacfifo: Fix the reset logic of the module	2018-10-11 16:57:30 +03:00
util_dacfifo_constr.xdc	util_dacfifo: Update constraint file	2018-10-16 10:29:37 +03:00
util_dacfifo_hw.tcl	util_adcfifo/util_dacfifo: bundle AXIS signals into bus for Intel	2019-05-16 13:27:19 +03:00
util_dacfifo_ip.tcl	util_dacfifo: set OOC default clock constraints	2019-04-22 10:27:16 +03:00
util_dacfifo_ooc.ttcl	util_dacfifo: set OOC default clock constraints	2019-04-22 10:27:16 +03:00