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Lars-Peter Clausen 3cff0fa7dc pzsdr: ccpci: Use PL SPI and GPIO peripherals 
To be able to access the GPIO pins and the SPI port through the PCIe bridge
we need to use the PL SPI and GPIO controllers rather than the PS
controllers. Adjust the sytem_top.v accordingly so that the PL peripherals
are connected to the external pins.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2016-08-05 18:29:42 +02:00
library cleanup: Don't need Makefiles specific to xilinx/altera libraries. Top Makefile covers them 2016-08-05 16:27:52 +03:00
projects pzsdr: ccpci: Use PL SPI and GPIO peripherals 2016-08-05 18:29:42 +02:00
.gitattributes Update .gitattributes 2016-02-12 14:27:35 +02:00
.gitignore Update .gitignore file 2016-03-16 09:18:49 +02:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
Makefile Makefile: Added top level Makefile. Modified behavior of clean and clean-all 2015-04-17 17:22:38 +03:00
README.md README.md: Update the README 2016-03-31 19:42:52 +03:00

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