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Lars-Peter Clausen 3c7f73a880 axi_dmac: Fix dummy port enablement dependency 
It seems that in the latest version a constant of "0" is no longer a valid
enablement dependency and "false" has be used instead.

Not setting the enablement dependency correctly results in the AXI port to
be assumed to be read-write rather than just read or write. This will
generate unnecessary logic for example in interconnects to which the DMA
controller is connected.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2017-03-14 16:03:25 +01:00
..
altera altera/common- add asymmetric fifo 2017-03-01 15:35:04 -05:00
axi_ad6676 updated makefiles 2016-12-09 23:06:41 +02:00
axi_ad7616 axi_ad7616: Set up default driver value for input ports 2017-02-07 12:29:21 +02:00
axi_ad9122
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axi_ad9144 updated makefiles 2016-12-09 23:06:41 +02:00
axi_ad9152 ad9152- add prbs generators 2017-01-23 10:31:57 -05:00
axi_ad9162
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axi_ad9234 updated makefiles 2016-12-09 23:06:41 +02:00
axi_ad9250 updated makefiles 2016-12-09 23:06:41 +02:00
axi_ad9265
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axi_ad9361 axi_ad9361- add receive init delay 2017-03-13 16:28:38 -04:00
axi_ad9371 ad9371- missing net declarations 2017-02-28 13:31:23 -05:00
axi_ad9434 updated makefiles 2016-12-09 23:06:41 +02:00
axi_ad9467 updated makefiles 2016-12-09 23:06:41 +02:00
axi_ad9625 updated makefiles 2016-12-09 23:06:41 +02:00
axi_ad9643 updated makefiles 2016-12-09 23:06:41 +02:00
axi_ad9652 updated makefiles 2016-12-09 23:06:41 +02:00
axi_ad9671 updated makefiles 2016-12-09 23:06:41 +02:00
axi_ad9680 updated makefiles 2016-12-09 23:06:41 +02:00
axi_ad9684 updated makefiles 2016-12-09 23:06:41 +02:00
axi_ad9739a updated makefiles 2016-12-09 23:06:41 +02:00
axi_ad9963 axi_ad9963: Initial commit 2017-01-31 16:18:58 +02:00
axi_adc_decimate constraints: Update constraints 2017-02-24 13:43:32 +02:00
axi_adc_trigger axi_adc_trigger: Added triggered register 2017-02-27 14:26:19 +02:00
axi_clkgen updated makefiles 2016-12-09 23:06:41 +02:00
axi_dac_interpolate constraints: Update constraints 2017-02-24 13:43:32 +02:00
axi_dmac axi_dmac: Fix dummy port enablement dependency 2017-03-14 16:03:25 +01:00
axi_generic_adc updated makefiles 2016-12-09 23:06:41 +02:00
axi_gpreg constraints: Update constraints 2017-02-24 13:43:32 +02:00
axi_hdmi_rx updated makefiles 2016-12-09 23:06:41 +02:00
axi_hdmi_tx constraints: Update constraints 2017-02-24 13:43:32 +02:00
axi_i2s_adi scripts/adi_ip: Fix adi_ip_infer_interfaces process 2017-01-12 12:15:33 +02:00
axi_intr_monitor updated makefiles 2016-12-09 23:06:41 +02:00
axi_logic_analyzer axi_logic_analyzer: Triggering changes on valid data 2017-03-14 15:25:00 +02:00
axi_mc_controller updated makefiles 2016-12-09 23:06:41 +02:00
axi_mc_current_monitor updated makefiles 2016-12-09 23:06:41 +02:00
axi_mc_speed updated makefiles 2016-12-09 23:06:41 +02:00
axi_spdif_rx scripts/adi_ip: Fix adi_ip_infer_interfaces process 2017-01-12 12:15:33 +02:00
axi_spdif_tx
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axi_usb_fx3 axi_usb_fx3: Fixed clock domain association 2017-02-14 11:48:07 +02:00
cn0363 updated makefiles 2016-12-09 23:06:41 +02:00
common axi_ad9361- add receive init delay 2017-03-13 16:28:24 -04:00
cordic_demod updated makefiles 2016-12-09 23:06:41 +02:00
interfaces
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prcfg library/prcfg : Split data bus to channels 2015-10-13 11:36:45 +03:00
scripts scripts/adi_ip: Update the adi_ip_properties process 2017-01-19 15:06:47 +02:00
spi_engine spi_engine: Set up default driver value for input ports 2017-02-07 12:30:46 +02:00
util_adcfifo adcfifo- asym_mem primitive changes 2017-03-01 15:55:56 -05:00
util_axis_fifo
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util_axis_resize updated makefiles 2016-12-09 23:06:41 +02:00
util_bsplit updated makefiles 2016-12-09 23:06:41 +02:00
util_ccat updated makefiles 2016-12-09 23:06:41 +02:00
util_clkdiv util_clkdiv: Keep as valid only settings common for 7Series and Ultrascale 2017-01-18 11:56:24 +02:00
util_cpack updated makefiles 2016-12-09 23:06:41 +02:00
util_dacfifo util_dacfifo: Define constraints for bypass 2017-03-07 16:14:46 +02:00
util_extract util_extract: Initial commit 2017-01-31 16:26:05 +02:00
util_fir_dec util_fir_dec: Changed output rounding mode to Symmetric rounding to Zero 2017-03-09 16:33:17 +02:00
util_fir_int util_fir_int: Shifted data so that the amplitude at the output of the filter is the same with the input 2017-03-08 14:29:26 +02:00
util_gmii_to_rgmii updated makefiles 2016-12-09 23:06:41 +02:00
util_i2c_mixer
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util_mfifo updated makefiles 2016-12-09 23:06:41 +02:00
util_pmod_adc updated makefiles 2016-12-09 23:06:41 +02:00
util_pmod_fmeter updated makefiles 2016-12-09 23:06:41 +02:00
util_rfifo constraints: Update constraints 2017-02-24 13:43:32 +02:00
util_sigma_delta_spi
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util_tdd_sync util_sync_constr: Preserve 1bit CDCs with ASYNC_REG true 2017-02-23 11:44:01 +02:00
util_upack updated makefiles 2016-12-09 23:06:41 +02:00
util_var_fifo
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util_wfifo constraints: Update constraints 2017-02-24 13:43:32 +02:00
xilinx axi_dacfifo: Match the ports with util_dacfifo 2017-03-03 18:46:16 +02:00
Makefile Make: Update Makefiles 2017-02-10 16:32:58 +02:00