pluto_hdl_adi/projects/common/a5gt
Rejeesh Kutty cb3d1883bc fmcjesdadc1/a5gt- hard placement of ddr hr/qr registers 2017-02-17 15:21:33 -05:00
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a5gt_system_assign.tcl fmcjesdadc1/a5gt- hard placement of ddr hr/qr registers 2017-02-17 15:21:33 -05:00
a5gt_system_qsys.tcl projects/a5gt- use 50m afi clock for cpu- xcvr reconfig timing 2016-12-22 14:14:21 -05:00