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Istvan Csomortani 7008c641b5 axi_adrv9371/zc706: Constraints update 
From source *jesd_rstgen* is a false path for TX and RX_OS too.
 		2016-11-11 10:35:09 +02:00
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a10gx adrv9371x: Updated constraints for altera projects 2016-11-04 18:20:46 +02:00
a10soc adrv9371x: Updated constraints for altera projects 2016-11-04 18:20:46 +02:00
common a10soc- xcvr updates 2016-10-27 09:25:00 -04:00
zc706 axi_adrv9371/zc706: Constraints update 2016-11-11 10:35:09 +02:00
Makefile adrv9371x: Initial commit 2016-08-16 15:50:46 +03:00