intel
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axi_ad9361 : add non DPA mode support
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2020-02-24 11:31:01 +02:00 |
xilinx
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axi_ad9361 : add non DPA mode support
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2020-02-24 11:31:01 +02:00 |
Makefile
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all: Rename altera to intel
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2019-06-29 06:53:51 +03:00 |
axi_ad9361.v
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axi_ad9361 : add non DPA mode support
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2020-02-24 11:31:01 +02:00 |
axi_ad9361_ip.tcl
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axi_ad9361 : add non DPA mode support
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2020-02-24 11:31:01 +02:00 |
axi_ad9361_rx.v
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Add FPGA info parameters flow
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2019-03-30 11:26:11 +02:00 |
axi_ad9361_rx_channel.v
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license: Fix a spelling mistake
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2018-04-11 15:09:54 +03:00 |
axi_ad9361_rx_pnmon.v
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license: Fix a spelling mistake
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2018-04-11 15:09:54 +03:00 |
axi_ad9361_tdd.v
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license: Fix a spelling mistake
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2018-04-11 15:09:54 +03:00 |
axi_ad9361_tdd_if.v
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license: Fix a spelling mistake
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2018-04-11 15:09:54 +03:00 |
axi_ad9361_tx.v
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axi_ad9361: sync dac_valid to adc_valid
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2019-09-27 17:52:10 +03:00 |