Adrian Costina b01cf35cf7 axi_adcfifo: Fix constraints to apply also to Ultrascale devices ... Used IS_SEQUENTIAL instead of PRIMITIVE_SUBGROUP==flop to identify ff related constraints		2018-09-07 17:44:47 +03:00
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axi_adcfifo	axi_adcfifo: Fix constraints to apply also to Ultrascale devices	2018-09-07 17:44:47 +03:00
axi_adxcvr	axi|util_adxcvr: Delete reset interface inference for PLL resets	2018-08-23 18:41:48 +03:00
axi_dacfifo	ad_mem_asym: Improve the implementation of the asymmetric RAM	2018-08-06 17:29:05 +03:00
axi_xcvrlb	Move Altera IP core dependency tracking to library Makefiles	2018-04-11 15:09:54 +03:00
common	ad_rst: All the synchronization registers have to have ASYNC_REG TRUE	2018-08-14 17:54:14 +03:00
util_adxcvr	axi|util_adxcvr: Delete reset interface inference for PLL resets	2018-08-23 18:41:48 +03:00