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Sergiu Arpadi 297bed6721 ad7134_fmc: Change ODR signal to output 
FPGA is now generating the ODR signal using axi_pwm_gen.
Both ADCs are now in slave mode.
 		2022-02-07 14:41:25 +02:00
..
common ad7134_fmc: Change ODR signal to output 2022-02-07 14:41:25 +02:00
zed ad7134_fmc: Change ODR signal to output 2022-02-07 14:41:25 +02:00
Makefile Makefiles: Update header with the appropriate license 2021-09-16 16:50:53 +03:00
Readme.md start adding some doc to the ./projects directory 2021-11-10 14:01:06 +02:00

Readme.md

AD7134-FMC HDL Project

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