pluto_hdl_adi/projects/adrv9371x
Adrian Costina d18f6aa816 adrv9371x: A10GX, added adcfifo
- connected dac dma to 133 MHz clock
- set explicit clock rate to xcvr reference clock bridge
2016-08-26 14:46:48 +03:00
..
a10gx adrv9371x: A10GX, switched TX lanes 2016-08-24 18:06:14 +03:00
a10soc hdlmake- updates 2016-08-19 15:59:41 -04:00
common adrv9371x: A10GX, added adcfifo 2016-08-26 14:46:48 +03:00
zc706 dmafifo- adc/dac split 2016-08-16 12:54:39 -04:00
Makefile adrv9371x: Initial commit 2016-08-16 15:50:46 +03:00