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pluto_hdl_adi/library/spi_engine
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Stanca Pop 164aa97ec3 spi_engine: Update pulse generation 
The pulse period had a fixed value. Therefore, in order to be able
to configure it from the software, a 32b register pulse_period_reg
was added in axi_spi_engine. Also, to generate the pulse, the
output register pulse_gen_loadc was added.
 		2019-09-27 17:02:37 +03:00
..
axi_spi_engine spi_engine: Update pulse generation 2019-09-27 17:02:37 +03:00
interfaces spi_engine: Add support for 8 SDI lines 2018-04-11 15:09:54 +03:00
spi_engine_execution library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
spi_engine_interconnect library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00
spi_engine_offload library/scripts: Rename adi_ip.tcl to adi_ip_xilinx.tcl 2019-06-29 06:53:51 +03:00