9e8d35b6e6
When trying to use ad_cpu_interconnect to connect to a AXI interface that is a outer port of a hierarchy this will fail at the moment as it kind find the matching clock and reset signals. Add support for traversing into the hierarchy and find the final target AXI port inside the hierarchy. Then find the matching clock and reset and traverse them back the corresponding hierarchy outer ports. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
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| .. | ||
| adi_board.tcl | ||
| adi_env.tcl | ||
| adi_prcfg_project.tcl | ||
| adi_project.tcl | ||
| adi_tquest.tcl | ||