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pluto_hdl_adi/library/altera/adi_jesd204
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Adrian Costina 1b1edd1b03 jesd204: Added additional input registers to jesd204_soft_pcs_rx, when lane rate is over 10Gbps 2017-10-25 14:36:54 +01:00
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adi_jesd204_hw.tcl jesd204: Added additional input registers to jesd204_soft_pcs_rx, when lane rate is over 10Gbps 2017-10-25 14:36:54 +01:00