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Adrian Costina 0d67af370f util_upack: Fixed problem when dac valid isn't continuous from the DAC 
In cases when the dac_valid_ from the DAC is not continuous, in some situations
there were two dac_valid pulses sent to the DMA.
 		2016-02-04 13:03:46 +02:00
library util_upack: Fixed problem when dac valid isn't continuous from the DAC 2016-02-04 13:03:46 +02:00
projects daq2: Fix clock constraints for KC705 and VC707 2016-01-22 19:09:57 +02:00
.gitattributes Add .gitattributes file 2015-06-26 11:07:10 +02:00
.gitignore ignore gui 2015-09-22 16:32:02 -04:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
Makefile Makefile: Added top level Makefile. Modified behavior of clean and clean-all 2015-04-17 17:22:38 +03:00
README.md README.md: Update Vivado's version number 2015-09-29 15:11:10 +03:00

README.md

#HDL Reference Designs

Analog Devices HDL libraries and projects

###Tools version:

###Documentation and support

For first time users, it is highly recommended to go through our HDL user guide.

For support please visit our FPGA Reference Designs Support Community on EngineerZone.