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Adrian Costina 07e52b4566 m2k: Connect logic_analyzer path to clk_out instead of clk 
- this allows for the clock switching to be done inside axi_logic_analyzer core
 		2017-04-18 12:17:39 +02:00
library axi_logic_analyzer: Allow only data[0] to be used as alternative clock. 2017-04-18 12:17:39 +02:00
projects m2k: Connect logic_analyzer path to clk_out instead of clk 2017-04-18 12:17:39 +02:00
.gitattributes Update .gitattributes 2016-02-12 14:27:35 +02:00
.gitignore Update .gitignore 2016-12-19 15:37:05 +00:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
Makefile Makefile: Added top level Makefile. Modified behavior of clean and clean-all 2015-04-17 17:22:38 +03:00
README.md README.md: Update the README 2016-03-31 19:42:52 +03:00

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